Thursday, January 25, 2024

XC95108 8-Bit Binary to Hexadecimal Converter VHDL

In this VHDL example, I use an XC85108 CPLD to read an 8-bit binary input. Then the internal digital circuit will convert it into hexadecimal value. The result is in 2 place values hexadecimal displaying on a two-digit common cathode 7-Segment display.

XC95108 8-Bit Binary to Hexadecimal Converter VHDL
XC95108 CPLD DIY Prototype Board

I divided the 8-bit input into two nibble, the higher nibble and the lower nibble. The VHDL conversion between these two bases is very straight forward. The code just decode these two nibble using the concurrent VHDL WITH and Select statement.

  1. ----------------------------------------------------------------------------------
  2. -- Company:
  3. -- Engineer:
  4. --
  5. -- Create Date: 14:14:12 01/25/2024
  6. -- Design Name:
  7. -- Module Name: bin_8_to_hex - Behavioral
  8. -- Project Name:
  9. -- Target Devices:
  10. -- Tool versions:
  11. -- Description:
  12. --
  13. -- Dependencies:
  14. --
  15. -- Revision:
  16. -- Revision 0.01 - File Created
  17. -- Additional Comments:
  18. --
  19. ----------------------------------------------------------------------------------
  20. library IEEE;
  21. use IEEE.STD_LOGIC_1164.ALL;
  22.  
  23. -- Uncomment the following library declaration if using
  24. -- arithmetic functions with Signed or Unsigned values
  25. --use IEEE.NUMERIC_STD.ALL;
  26.  
  27. -- Uncomment the following library declaration if instantiating
  28. -- any Xilinx primitives in this code.
  29. --library UNISIM;
  30. --use UNISIM.VComponents.all;
  31.  
  32. entity bin_8_to_hex is
  33. Port ( BIN_H, BIN_L : in STD_LOGIC_VECTOR (3 downto 0);
  34. LED1 : out STD_LOGIC_VECTOR (7 downto 0);
  35. LED2 : out STD_LOGIC_VECTOR (7 downto 0));
  36. end bin_8_to_hex;
  37.  
  38. architecture Behavioral of bin_8_to_hex is
  39.  
  40. begin
  41.  
  42. --LOWER NIBBLE
  43. WITH BIN_L SELECT
  44. LED1 <= x"3F" WHEN x"0",
  45. x"06" WHEN x"1",
  46. x"5B" WHEN x"2",
  47. x"4F" WHEN x"3",
  48. x"66" WHEN x"4",
  49. x"6D" WHEN x"5",
  50. x"7D" WHEN x"6",
  51. x"07" WHEN x"7",
  52. x"7F" WHEN x"8",
  53. x"6F" WHEN x"9",
  54. x"77" WHEN x"A",
  55. x"7C" WHEN x"B",
  56. x"39" WHEN x"C",
  57. x"5E" WHEN x"D",
  58. x"79" WHEN x"E",
  59. x"71" WHEN x"F",
  60. x"00" WHEN OTHERS;
  61.  
  62. --HIGHER NIBBLE
  63. WITH BIN_H SELECT
  64. LED2 <= x"3F" WHEN x"0",
  65. x"06" WHEN x"1",
  66. x"5B" WHEN x"2",
  67. x"4F" WHEN x"3",
  68. x"66" WHEN x"4",
  69. x"6D" WHEN x"5",
  70. x"7D" WHEN x"6",
  71. x"07" WHEN x"7",
  72. x"7F" WHEN x"8",
  73. x"6F" WHEN x"9",
  74. x"77" WHEN x"A",
  75. x"7C" WHEN x"B",
  76. x"39" WHEN x"C",
  77. x"5E" WHEN x"D",
  78. x"79" WHEN x"E",
  79. x"71" WHEN x"F",
  80. x"00" WHEN OTHERS;
  81.  
  82. end Behavioral;
  83.  
  84.  

The XC95108, 7-Segment display and input switch wiring diagram are listed below.

XC95108 8-Bit Binary to Hexadecimal Converter VHDL
Wiring Diagram on the XC95108 CPLD Prototype Board

In Xilinx ISE we need to assign its I/O pins using Floorplan IO tool. 

XC95108 8-Bit Binary to Hexadecimal Converter VHDL
XC9500 CPLD Report

This digital circuit design requires very little resource of the XC95108 CPLD. We can use the Xilinx Parallel Cable III to program this CPLD in Xilinx ISE 14.7.



Click here to download this example.


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